Sep 2025 - Present
Capstone Research Student
Scotiabank
University capstone project conducted in collaboration with Scotiabank, focusing on cash break reconciliation in a real-world financial environment.
Python, LLM Agents, Data Analysis, Systems Design
May 2024 - Aug 2025
GPU Graphics Driver Validation & Debug Engineer Intern
AMD
Responsible for system testing, automation, and telemetry in GPU driver validation. Work on regression testing, issue resolution, and automation to enhance efficiency in new OS releases.
Python, PowerShell, Automation, Windows OS Testing
Sep 2022 - Sep 2023
Electrical Team
Blue Sky Solar Racing
Contributed to the design and testing of electrical systems for a solar-powered racing car. Worked with PCB layouts, soldering, and system optimization to enhance vehicle performance.
PCB Design, Altium Designer, Circuit Testing, Soldering
Sep 2016 - Jun 2021
Flight Sergeant
Royal Canadian Air Cadets
Led cadet training programs focused on leadership, discipline, and outdoor survival skills. Worked closely with Canadian Armed Forces personnel to deliver structured learning experiences.
Leadership, Team Coordination, Public Speaking
Projects
Findash
Findash is a full-stack personal finance dashboard that helps users track net worth, budgets, and financial goals in real time. It features secure authentication, Row-Level Security (RLS) for per-user data isolation, and interactive dashboards designed for usability and speed.
Next.js (App Router), Supabase, PostgreSQL, Tailwind CSS, shadcn/ui, Vercel
OTFMap
As a part of our Software Design & Communications course, we have developed a user friendly Geographic Information System (GIS) with a wide array of features to provide a comprehensive solution for all navigation needs.
GTK, EZGL, OpenStreetMap API
Threads & Process Manager
In our Operating Systems course, we integrated advanced synchronization mechanisms using C for hash table operations. This involved employing pthread mutexes to ensure thread-safe data access and modification in a multi-threaded environment.
C, Linux, Virtual Machines
16-bit Enhanced Processor
In our Computer Organization course, we developed a 16-bit processor featuring 8 registers, capable of executing instructions like mov, movt, add, sub, ldr, str, and b. For debugging, we used ModelSim's FSM timing diagram, enhancing the ALU for add, sub, and and operations.
Verilog (HDL), Assembly, ModelSim